In telecommunications which is communication or data or information exchange within, over, or among electronic systems typically packet-based transport is used. A Packet is sometimes also called a Message, a Payload Data Unit, or a Protocol Data Unit, or a Packet Data Unit, or a PDU, and is a unit of information that is delivered among peer entities of a communication network. In a layered system according to the Open Systems Interconnection (OSI) model, a Packet is a unit of data which is specified in a protocol of a given layer and which consists of protocol-control information, such as, for example, a network address, and zero, or more, user data.
Various packet-based transport methods are known in the art, for example, GSM, UMTS, LTE, CAN, MOST, Flexray, LIN, AFDX, IIC, HDBase-T, Ethernet, EtherCat, ProfiNET, Sercos, TTCAN, UDP, TCP/IP, IPSec, PATA, SATA, PCIe, WiFi, Bluetooth, and many others.
Sometimes, it becomes necessary to transport a Packet of one given protocol over a network that utilizes a Second Protocol. This is, sometimes, referred to as transporting, tunneling or encapsulation.
The challenges in transporting, tunneling, or encapsulating, Packets of a First Protocol over a Second Protocol are manifold, and non-trivial to solve in practical Electronic System implementations.
Problems include, for example:
Packet Loss: in packet-based transport Packet Loss occurs when a Packet must be considered encumbered or invalid due to signal integrity issues or failing integrity checks, like Cyclic Redundancy Check (CRC), for example. If the First Protocol is loss-less, then every Packet considered invalid by a receiver must be resent by the transmitter of the Packet, while the original ordering of the Packet flow must also be maintained. This can be done by resending the entire, ordered sequence of Packets starting with the invalid Packet. Or, it can be done, for example, by just resending the invalid Packet in which case the receiver must insert the resent Packet back into the ordered sequence position where it replaces the invalid Packet. Those and other approaches known in the art each have their individual benefits and individual drawbacks depending on communication overhead, bandwidth and latency demands, and other technical and cost requirements, and are non-trivial to solve for a given protocol.
Rate Matching: In a loss-less protocol the transmitter must match the rate of Packets sent to the rate at which the receiver can digest the Packets. This concept goes with a technique called flow control. Various approaches for flow control are known in the art: XON/XOFF, reject/resend, or credit-based flow control. Another technique known in the art for rate matching is using buffers, or queues, to temporarily hold one, or more, Packets that cannot be digested by the receiver at the moment, although such techniques will only work for small rate differences and over short moments in time, as otherwise the buffers need to be unpractically large.
Starvation and Deadlocks: Starvation and/or deadlocks can occur in such buffered, or queued, packet-based transport systems, and is, for example, described in U.S. Pat. No. 5,961,623 by James et al., which is hereby included in its entirety by reference or in the book from Addison-Wesley “PCI Express System Architecture” by Ravi Budruk et al. which is hereby included in its entirety by reference, or in the book from Addison-Wesley “PCI System Architecture”, Fourth Edition by Tom Shanley et al which is hereby included in its entirety by reference.
Re-packetizing: Re-packetizing is the process of taking Packets of a First Protocol, stripping the headers of the First Protocol, effectively extracting the payload, adding headers of the Second Protocol, and sending the result as Packets of a Second Protocol. Re-packetizing in form of encapsulation is also the process of taking one, or more, Packets of a First Protocol and putting them inside, as payload, of one, or more, Packets of a Second Protocol for transport. Re-packetizing is also called encapsulation when it refers to the process of receiving Packets of a Second Protocol and to extract Packets of a First Protocol from the payload of Packets of a Second Protocol. In most Electronic Systems the Packets of a First Protocol and the Packets of a Second Protocol will be different in size (as measure in multiples of bits and/or Bytes), leading to one of the two situations: i) Either the Packet of the First Protocol is smaller in size than the Packet of the Second Protocol, then every single Packet of the First Protocol can be transported by a single Packet of the Second Protocol. In some practical cases this may be desirable as Packets of a First Protocol can get sent without delay, thereby keeping the added latency of transporting, or encapsulation, low. However, depending on the protocol overhead of Second Protocol this may come at the disadvantage of wasting network bandwidth. In such practical cases it may be advantageous to aggregate two, or more, Packets of a First Protocol, into the payload of one Packet of the Second Protocol, as long as the aggregated Packets fit into the payload of one Packet of the Second Protocol, and transport them together. ii) If the Packets of a First Protocol are larger in size than the Packets of a Second Protocol, then every single Packet of the First Protocol must be split into two, or more, portions each small enough in size to fit the payload of a single Packet of the Second Protocol. This is sometimes referred to as segmentation. Aggregation and segmentation can also be combined to create maximum sized Packets of a Second Protocol.
With recent advancements in semiconductor technology and Electronic System processing it now becomes feasible to transport Packets of a First Protocol over a Second Protocol, cost and energy efficiently. Various approaches are known in the art:
In U.S. Pat. No. 5,961,623 by James et al., which is hereby included in its entirety by reference or in U.S. Pat. No. 7,581,044 by Davis, which is hereby included in its entirety by reference or in U.S. Pat. No. 7,443,869 by Solomon et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2007/0121495 by Breti et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2014/0237156 by Regula et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2004/0019729 by Kelley et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2002/0146022 by Van Doren et al., which is hereby included in its entirety by reference techniques are presented to avoid deadlocks and/or starvation for packet-based transport using one single protocol, namely PCI Express. However, none of those publications addresses any aspects when Packets of a First Protocol get transported over a Second Protocol.
In United States Patent Application Number 2011/0064089 by Hidaka et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2011/0185163 by Hidaka et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2013/0086295 by Hidaka et al., which is hereby included in its entirety by reference or in U.S. Pat. No. 9,348,396 by Higuchi et al., which is hereby included in its entirety by reference or in U.S. Pat. No. 8,533,381 by Uehara et al., which is hereby included in its entirety by reference or in U.S. Pat. No. 8,949,499 by Freking et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2006/0126612 by Sandy et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2012/0110233 by Higuchi et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2007/0198763 by Suzuki et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2017/0109310 by Takahashi et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2014/0245053 by Yoshikawa et al., which is hereby included in its entirety by reference or in U.S. Pat. No. 9,264,384 by Sundaresan et al., which is hereby included in its entirety by reference or in U.S. Pat. No. 7,480,303 by Ngai, which is hereby included in its entirety by reference or in U.S. Pat. No. 9,191,109 by Zbinden et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2008/0291994 by Lida et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2017/0163744 by Lida et al., which is hereby included in its entirety by reference or in United States Patent Application Number 2011/0317587 by Lida et al., which is hereby included in its entirety by reference or in U.S. Pat. No. 9,064,058 by Daniel, which is hereby included in its entirety by reference techniques are presented for transporting Packets of a First Protocol for example by encapsulating them into Packets of a Second Protocol. This includes techniques for addressing, or for routing. However, none of those publications addresses any aspects of avoiding deadlocks and/or starvation.
At the same time, combining techniques for packet-based transport of Packets of a First Protocol via a Second Protocol with techniques for avoiding deadlocks and/or starvations is not trivial as the deadlock and starvation avoiding techniques of First Protocol are in most cases neither applicable nor practicable to the Second Protocol. For example, techniques for avoiding deadlocks and/or starvation applicable to the PCI Express protocol cannot be applied to the TCP/IP protocol, as we will demonstrate later.
This creates the need for solutions that effectively can avoid deadlocks and/or starvation when Packets of a First Protocol get transported over a Second Protocol and, at the same time, are efficient with regards to bandwidth and/or latency in terms of re-packetizing.
PCB is a Printed Circuit Board.
ECU is an Electronic Control Unit and is a generic term for any embedded system that controls one or more of the electrical systems or subsystems in a motor vehicle.
PLC is a Programmable Logic Controller and is a digital computer used for automation of electromechanical processes, such as control of machinery on factory assembly lines, amusement rides, or light fixtures.
A Programmable Circuit is an integrated digital and/or analog circuit device which can be user-programmed without a manufacturing step, typically by uploading a configuration bit file into the device after power-up.
FPGA is a Field-Programmable Gate-Array, a special digital Programmable Circuit device.
FPAA is a Field-Programmable Analog-Array, a special analog Programmable Circuit device.
PLD is a Programmable Logic Device, another special Programmable Circuit device.
CPLD is a Complex Programmable Logic Device, another special Programmable Circuit device.
FSM is a Finite State Machine which can be implemented in a digital circuit.
CPU is a Central Processing Unit, typically a Von-Neumann data processing machine.
DSP is a Digital Signal Processor, a CPU highly optimized towards processing digital signal values.
ASIC is an Application Specific Integrated Circuit which is a digital, or mixed-signal, or analog integrated circuit optimized and built for a specific application.
ASSP is an Application-Specific Standard Processor which is an integrated digital circuit device which comprises one, or more, CPUs, plus application-specific circuitry.
Microcontroller is a digital and/or mixed-signal integrated circuit device which comprises one, or more, CPUs plus special-purpose peripherals and inputs/outputs.
SOC is a System-on-a-Chip which is a digital and/or mixed-signal integrated circuit device which comprises one, or more, CPUs, special-purpose peripherals, inputs/outputs, application-specific circuitry, memory, etc.
PSOC is a Programmable System-on-a-Chip, a SOC which is implemented using Programmable Circuits.
HW is Hardware, typically integrated circuits, and passive electronic components, combined on a PCB.
SW is Software, typically human and/or machine-readable code for execution by a data processing machine.
FW is Firmware, typically Hardware-dependent Software code.
HDL is Hardware Description Language which is a human and machine readable language typically used to describe the behavior, structure, concurrency, and/or timing of integrated digital, or analog, circuitry. Examples of HDL are VHDL, Verilog, SystemVerilog, SystemC, or C, or C++.
VHDL is VHSIC hardware description language which is the HDL specified and standardized, for example, by IEEE 1076-2008, which is hereby included in its entirety by reference.
Verilog is the HDL specified and standardized for example, by IEEE 1364-2005, which is hereby included in its entirety by reference.
SystemVerilog is the HDL specified and standardized, for example, by IEEE 1800-2009, which is hereby included in its entirety by reference.
SystemC is the HDL specified and standardized, for example, by IEEE 1666-2005, which is hereby included in its entirety by reference.
PLB is Processor Local Bus which is defined by IBM's CoreConnect on-chip architecture.
AXI is the Advanced eXtensible Interface which is part of the Advanced Microcontroller Bus Architecture (AMBA) defined by ARM Ltd.
RAM is Random Access Memory which typically is volatile digital storage, such as DDR2 RAM or DDR3 RAM or LPDDR RAM.
OS is Operating System which is Software code for resource, task, and user management of a data processing system.
Router is a device or an application that forwards data packets between computer networks, creating an overlay internetwork.
A Bridge applies a forwarding technique used in packet-switched computer networks and typically makes no assumptions about where in a network a particular address is located.
A Tunnel is using a networking protocol where one network protocol (the delivery protocol) encapsulates a different payload protocol, for example to carry a payload over an incompatible delivery-network, or to provide a secure path through an untrusted network.
GSM stands for Global System for Mobile Communications and is a standard set developed by the European Telecommunications Standards Institute to describe technologies for second generation digital cellular networks.
UMTS stands for Universal Mobile Telecommunications System and is a third generation mobile cellular technology for networks based on the GSM standard.
LTE stands for Long-Term Evolution and is a fourth generation mobile cellular technology for networks based on the GSM standard.
CAN is Controller Area Network which is a vehicle bus standard ISO 11898 designed to allow microcontrollers and devices to communicate with each other within a vehicle without a host computer.
MOST is Media Oriented Systems Transport which is a high-speed multimedia network technology optimized by the automotive industry.
Flexray is an automotive network communications protocol developed by the FlexRay Consortium, and which is currently being converted into an ISO standard.
LIN is Local Interconnect Network which is a vehicle bus standard or computer networking bus-system used within current automotive network architectures.
AFDX is Avionics Full-Duplex Switched Ethernet which is a data network for safety-critical applications that utilizes dedicated bandwidth while providing deterministic Quality of Service. AFDX is based on IEEE 802.3 Ethernet technology and is described specifically by the ARINC 664 specification.
SPI is Serial Peripheral Interface Bus which is a synchronous serial data link standard, named by Motorola, that operates in full duplex mode.
IIC is Inter-Integrated Circuit which is a multi-master serial single-ended computer bus invented by Philips that typically is used to attach low-speed peripherals.
GPIO is General Purpose Input/Output is generic pins on an integrated circuit whose behavior (including whether it is an input or output pin) can be controlled through software.
Ethernet is a family of computer networking technologies for local area networks and is standardized in IEEE 802.3.
EtherCat is Ethernet for Control Automation Technology which is an open high performance Ethernet-based fieldbus system.
ProfiNET is the open industrial Ethernet standard of PROFIBUS & PROFINET International for automation.
Sercos is Serial Real-Time Communication System Interface which is a globally standardized open digital interface for the communication between industrial controls, motion devices (drives) and input output devices (I/O) and is classified as standard IEC 61491 and EN 61491.
TTCAN is Time-Triggered communication on CAN which is defined by the ISO 11898-4 standard.
CANOpen is a communication protocol and device profile specification for embedded systems used in automation. The basic CANopen device and communication profiles are given in the CiA 301 specification released by CAN in Automation.
HDBase-T or HDBaseT or HDBT is a commercial connectivity standard and transmission protocol, defined by the HDBaseT Alliance.
UDP is User Datagram Protocol which is one of the core members of the Internet Protocol Suite, the set of network protocols used for the Internet.
TCP/IP is Transmission Control Protocol/Internet Protocol is a descriptive framework for the Internet Protocol Suite of computer network protocols created in the 1970s by DARPA. TCP/IP has four abstraction layers and is defined in RFC 1122.
IPSec is Internet Protocol Security which is a protocol suite for securing Internet Protocol (IP) communications by authenticating and encrypting each IP packet of a communication session. IPsec also includes protocols for establishing mutual authentication between agents at the beginning of the session and negotiation of cryptographic keys to be used during the session.
RS232 is Recommended Standard 232 which is the traditional name for a series of standards for serial binary single-ended data and control signals connecting between a DTE (Data Terminal Equipment) and a DCE (Data Circuit-terminating Equipment).
RS485 also known as EIA-485, also known as TIA/EIA-485 is a standard defining the electrical characteristics of drivers and receivers for use in balanced digital multi-point systems. This standard is published by the ANSI Telecommunications Industry Association/Electronic Industries Alliance (TIA/EIA).
USB is Universal Serial Bus which is an industry standard developed in the mid-1990s that defines the cables, connectors and communications protocols used in a bus for connection, communication and power supply between computers and electronic devices.
PATA is Parallel ATA which is an interface standard for the connection of storage devices such as hard disks, solid-state drives, floppy drives, and optical disc drives in computers.
SATA is Serial Advanced Technology Attachment which is a computer bus interface for connecting host bus adapters to mass storage devices such as hard disk drives and optical drives.
PCIe also known as PCI Express (Peripheral Component Interconnect Express) is a computer expansion bus standard maintained and developed by the PCI Special Interest Group.
WiFi is a mechanism that allows electronic devices to exchange data wirelessly over a computer network using the IEEE 802.11 family of standards.
Bluetooth is a proprietary open wireless technology standard for exchanging data over short distances, creating personal area networks with high levels of security, a standard which is maintained by the Bluetooth Special Interest Group.